1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device and a manufacturing method for the same.
2. Discussion of the Related Art
In general, methods for forming a device isolation trench have recently been applied in manufacturing semiconductor devices in accordance with design rules of less than 0.25 μm. In other words, trench technology has been used for device isolation in which trenches between devices are formed according to predetermined design rules by partially etching a semiconductor substrate.
Currently, a shallow trench isolation (STI) method is generally used for device isolation. According to the STI method, trenches are formed by partially etching a silicon substrate, and an insulating film, for example, an oxide layer, is vapor-deposited into the trench. Next, the insulating film is removed from an active region by a chemical mechanical polishing (CMP) process so that the insulating film remains only on a field region.
However, according to the general STI method, the length of a current path is increased compared with isolation structures formed by a local oxidation of silicon (LOCOS) as shown in FIG. 1. As a result, an on-resistance is increased.
Furthermore, since an N-drift region is formed by etching the silicon to form the STI trench, the surface dopant concentration of the N-drift region is reduced, accordingly causing an increase in the on-resistance.